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Instructions per cycleAmdahl's lawCycles per instructionAnalysis of parallel algorithmsComputational complexityAnalysis of algorithmsAlgorithmic efficiencyCache replacement policiesMicroarchitectureComplex instruction set computerProcessorInstruction schedulingTask parallelismOut-of-order executionGustafson's lawParallel programming modelPerformance per wattFrequency scalingMultiple instruction, single dataNo instruction set computingComputer architectureCpu cacheControl flowMachine codeClock rateInterprocedural optimizationComputer programmingNon-uniform memory accessExecute instructionTransactional memorySuperscalar processorProcessor power dissipationBranch target predictorSequential algorithmCpu multiplierI/o boundCentral processing unitSpeedupSyntaxHardware accelerationLockMicroprocessorCryptographic acceleratorInstruction-level parallelismIpo modelCache prefetchingMulti-core processorPurely functional programmingTomasulo's algorithmOperand forwardingParallel algorithmResource allocationCpu modesRuntimeThermal design powerProcessor designHistory of compiler constructionStructured concurrencyComputational learning theoryCpu-boundOutline of computer scienceProgramming language theoryProgram optimizationArbitrary-precision arithmeticHyper-threadingCellLoop nest optimizationArithmetic logic unitComputerReduced instruction set computerInstruction cycleLoop unrollingMicrocodeCpu timeRegister allocationReference countingDynamic programming languageCompilerAddress generation unitMultiprocessor system architectureCache-oblivious algorithmSelf-modifying codeData-driven programmingHoare logicIntrinsic functionCacheChipsetHardware-assisted virtualizationMemoizationInput/outputFunctional programmingInstruction registerData compression ratioAssembly languagePower usage effectivenessManycore processorTrace cacheHigh-throughput computingOpcodeCpuid